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Intel Celeron M 500er Serie
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Produktionsdatum (WW/JJJJ):
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Systemtakt / Systembustakt:
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133 MHz / 533 MHz quad-pumped (bis zu 4,3 GB/sek Datentransfer)
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478-pin micro Flip-Chip Pin Grid Array (mFC-PGA)
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Powermanagement System Management Mode Taktkontrolle und Low-Power States # Core Low Power States - C1/AutoHALT Powerdown state - C1/MWAIT Powerdown state - Core C2 State - Core C3 State # Package Low Power States - Stop Grant State - Stop Grant snoop state - Sleep state - Deep sleep state FSB Low Power Enhancements - Dynamic on-die termination disabling - Low VCCP (I/O termination voltage) Processor Power Status Indicator (PSI#) Signal
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Temperaturbereich (min/max):
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Verlustleistung (min/max):
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Intel Core Mikroarchitektur (1. Generation) 14-stufige Pipeline Dynamische Ausführung Extended Memory 64 Technologie - 64 Bit flat virtual address space - 64 Bit pointers - 64 Bit wide general purpose registers - 64 Bit integer support
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Befehlssatzerweiterungen:
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MMX, SSE, SSE2, SSE3 und SSSE3
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- 8-way set-associative - jeweils 32 KB Befehls- und Datencache
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- advanced transfer Cache - 4-way set-associative - gemeinsamer Befehls- und Datencache
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Enhanced Floating Point Unit Address Bus ( (überträgt zwei Datenpakete pro Takt) Quad-pumped FSB (überträgt vier Datenpakete pro Takt) Prozessor Thermal Features - Thermal Monitor - Digital Thermal Sensor - Out of specification detection - PROCHOT# Signal Pin - Thermal Diode
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